Micro-features are frequently created during the fabrication of semiconductor devices in order to isolate devices or to create other devices, for example capacitors. The micro-features may be etched in the surface of a substrate or etched in the surface of layers of materials formed on a substrate. As circuit geometries shrink to ever smaller micro-feature sizes, the aspect ratio (ratio of depth to width) of these micro-features increases. In addition to the ever smaller micro-feature sizes, increasingly complex micro-feature shapes and micro-feature sidewall profiles are used for advanced semiconductor devices.
Etched micro-features are often filled with silicon (Si) or silicon germanium (SiGe), where reduced defect filling is required. One common type defect is the creation of voids inside the micro-feature during a fill process. These voids cause areas of high electrical resistance and may interfere with circuit operation. Seams created in the fill process can also cause process and/or circuit operation problems. Conventional Si micro-feature fill processes include conformal Si deposition over the surfaces of the micro-feature where the level of defects inside the micro-feature increases as the aspect ratio and complexity increases. Filling micro-features using conformal Si deposition methods can create a center seam in perfectly vertical sidewall features, and can close up (pinch off) the opening of more complex shaped micro-features before the fill is complete inside the micro-feature, thereby creating voids. Thus, conventional conformal deposition techniques can create defects, and this problem is especially acute when voids are created in filling micro-features with retrograde walls (walls that overhang such that the opening of the micro-feature is smaller than it would be with a vertical wall).
Thus, new Si and SiGe fill processes are needed that provide reduced defects for void free filling of complex micro-feature shapes and profiles for advanced semiconductor devices.